Circuit Symbols
Drawing style

Circuit symbols chart

52 symbols in US and IEC style: 41 on the chart at one drawing scale, and 11 more variants from the symbol sheets.

Circuit symbols are the drawings a schematic uses for parts and their connections. Some differ between US and IEC style, such as the resistor’s zigzag and rectangle, and the coil’s loops and humps. Each row on this chart names a drawing and its meaning.⁠Source 1Source 2Source 3Source 4Source 5Source 6

Print or download the chart

US
IEC

Resistor R

US | IEC Both styles, yours first.

Name, letter Select a cell for more. A letter shows only where a cited source names one.

Fig. 1 — How to read a cell: resistor, US zigzag and IEC rectangle. A cell with one drawing is the same in both styles.

Passive components

15 symbols

  1. Resistor

    Designator R

    US
    IEC

    Resistor circuit symbol, US (IEEE 315 style), terminals 1, 2 US SVG Resistor circuit symbol, IEC 60617 style, terminals 1, 2 IEC SVG

    A resistor symbol stands for a component that opposes current. The zigzag (US style) and the plain rectangle (IEC style) are two drawings of the same component.

    Terminals 1, 2
    1, 2
    A fixed resistor has two interchangeable terminals; the symbol has no polarity.

  2. Variable resistor

    Designator R

    US
    IEC

    Variable resistor circuit symbol, US (IEEE 315 style), terminals 1, 2 US SVG Variable resistor circuit symbol, IEC 60617 style, terminals 1, 2 IEC SVG

    A diagonal arrow through the resistor body marks a variable resistor.

    Terminals 1, 2
    1, 2
    This symbol has two terminals and no polarity mark. The labels 1 and 2 only tell the two ends apart.

  3. Potentiometer

    Designator R

    US
    IEC

    Potentiometer circuit symbol, US (IEEE 315 style), terminals 1, W, 2 US SVG Potentiometer circuit symbol, IEC 60617 style, terminals 1, W, 2 IEC SVG

    A potentiometer has three terminals: the two ends of the resistive track and a wiper, drawn as an arrow touching the body.

    Terminals 1, W, 2
    1, 2
    Terminals 1 and 2 are the fixed terminals, one at each end of the resistive track.
    W
    W is the wiper: the movable third terminal, drawn as the arrow touching the body. It makes contact wherever it rests along the track.

  4. Thermistor

    Designator RT

    US
    IEC

    Thermistor circuit symbol, US (IEEE 315 style), terminals 1, 2 US SVG Thermistor circuit symbol, IEC 60617 style, terminals 1, 2 IEC SVG

    A thermistor's resistance changes with temperature. NTC resistance falls as temperature rises; PTC resistance rises. A generic thermistor symbol without a type label does not distinguish the two.

    Terminals 1, 2
    1, 2
    This symbol has two terminals and no polarity mark. The labels 1 and 2 only tell the two ends apart.

  5. LDR (light-dependent resistor)

    Designator R

    US
    IEC

    Light-dependent resistor circuit symbol, US (IEEE 315 style), terminals 1, 2 US SVG Light-dependent resistor circuit symbol, IEC 60617 style, terminals 1, 2 IEC SVG

    Two arrows arriving at a resistor body mark a light-dependent resistor (photoresistor).

    Terminals 1, 2
    1, 2
    This symbol has two terminals and no polarity mark. The labels 1 and 2 only tell the two ends apart.

  6. Capacitor

    Designator C

    Same in US and IEC style

    Capacitor circuit symbol, drawn the same in US and IEC style, terminals 1, 2 SVG Capacitor circuit symbol, drawn the same in US and IEC style, terminals 1, 2 SVG

    A capacitor symbol stands for two conductors separated by an insulator; the two parallel plates are a picture of that.

    Terminals 1, 2
    1, 2
    A non-polarised capacitor has two interchangeable terminals.

  7. Polarised (polarized) capacitor

    Designator C

    US
    IEC

    Polarised capacitor circuit symbol, US (IEEE 315 style), terminals +, − US SVG Polarised capacitor circuit symbol, IEC 60617 style, terminals +, − IEC SVG

    In the polarised capacitor drawings here, + marks the positive terminal. The US form has a curved negative plate; the IEC form has a hollow positive plate. The marked polarity must be respected.

    Terminals +, −
    +
    The + terminal is the one the polarity mark names as positive. In the US form here it connects to the straight plate; in the IEC form, to the hollow plate.
    −
    The − terminal is the other side of the marked polarity. In the US form here it connects to the curved plate; in the IEC form, to the plate opposite the hollow one.

  8. Variable capacitor

    Designator C

    Same in US and IEC style

    Variable capacitor circuit symbol, drawn the same in US and IEC style, terminals 1, 2 SVG Variable capacitor circuit symbol, drawn the same in US and IEC style, terminals 1, 2 SVG

    In the variable-capacitor convention used here, a diagonal arrow through the plates indicates adjustable capacitance.

    Terminals 1, 2
    1, 2
    A non-polarised capacitor has two interchangeable terminals.

  9. Inductor

    Designator L

    US
    IEC

    Inductor circuit symbol, US (IEEE 315 style), terminals 1, 2 US SVG Inductor circuit symbol, IEC 60617 style, terminals 1, 2 IEC SVG

    An inductor stores energy in a magnetic field and opposes changes in current; its symbol represents the coil.

    Terminals 1, 2
    1, 2
    The plain, uncoupled two-terminal inductor symbol has no fixed polarity mark; either terminal can be used as the voltage reference.

  10. Transformer

    Designator T

    US
    IEC

    Transformer circuit symbol, US (IEEE 315 style), terminals P1, P2, S1, S2 US SVG Transformer circuit symbol, IEC 60617 style, terminals P1, P2, S1, S2 IEC SVG

    The separate-winding transformer shown here transfers energy magnetically between windings without an internal conducting connection between them. This description excludes an autotransformer, whose windings share a conducting connection.

    Terminals P1, P2, S1, S2
    P1, P2
    The primary winding is the one driven by the source.
    S1, S2
    The secondary winding is the one that delivers power to the load.

Also drawn on the resistor sheet

Also drawn on the inductor sheet

Also drawn on the transformer sheet

Semi­conductors

9 symbols

  1. Diode

    Designator D

    Same in US and IEC style

    Diode circuit symbol, drawn the same in US and IEC style, terminals A, K SVG Diode circuit symbol, drawn the same in US and IEC style, terminals A, K SVG

    A diode conducts much more readily in its forward direction than in its reverse direction. Real devices also have leakage and reverse breakdown, which this page's simplified models omit.

    Terminals A, K
    A
    The anode (A) is the terminal opposite the bar. During forward conduction, conventional current enters the diode at the anode.
    K
    The cathode (K) is the terminal at the bar. During forward conduction, conventional current leaves the diode at the cathode.

  2. LED (light-emitting diode)

    Designator DS

    Same in US and IEC style

    Light-emitting diode circuit symbol, drawn the same in US and IEC style, terminals A, K SVG Light-emitting diode circuit symbol, drawn the same in US and IEC style, terminals A, K SVG

    Two arrows leaving the diode body mark a light-emitting diode.

    Terminals A, K
    A
    The anode (A) is the terminal opposite the bar. During forward conduction, conventional current enters the diode at the anode.
    K
    The cathode (K) is the terminal at the bar. During forward conduction, conventional current leaves the diode at the cathode.

  3. NPN transistor

    Designator Q

    US
    IEC

    NPN transistor circuit symbol, US (IEEE 315 style), terminals B, C, E US SVG NPN transistor circuit symbol, IEC 60617 style, terminals B, C, E IEC SVG

    A bipolar transistor has base, collector and emitter terminals. In the current-controlled model used here, base drive controls conduction between collector and emitter.

    Terminals B, C, E
    B
    The base is the terminal drawn against the flat bar; a small base current controls the device.
    C
    The collector is the branch connected to the base bar that has no emitter arrow. The base has its own separate lead to that bar.
    E
    The arrow is always on the emitter. It points out of the transistor for NPN and into it for PNP, whichever way the symbol is rotated.

  4. PNP transistor

    Designator Q

    US
    IEC

    PNP transistor circuit symbol, US (IEEE 315 style), terminals B, C, E US SVG PNP transistor circuit symbol, IEC 60617 style, terminals B, C, E IEC SVG

    The arrow is always on the emitter. It points out of the transistor for NPN and into it for PNP, whichever way the symbol is rotated.

    Terminals B, C, E
    B
    The base is the terminal drawn against the flat bar; a small base current controls the device.
    C
    The collector is the branch connected to the base bar that has no emitter arrow. The base has its own separate lead to that bar.
    E
    The arrow is always on the emitter. It points out of the transistor for NPN and into it for PNP, whichever way the symbol is rotated.

  5. N-channel MOSFET

    Designator Q

    US
    IEC

    N-channel MOSFET circuit symbol, US (IEEE 315 style), terminals G, D, S US SVG N-channel MOSFET circuit symbol, IEC 60617 style, terminals G, D, S IEC SVG

    A MOSFET uses gate voltage relative to source to control its channel between drain and source. The three-terminal form shown here connects its body internally to source.

    Terminals G, D, S
    G
    The gate is the insulated terminal drawn parallel to the channel with a gap between them.
    D
    The drain (D) is the other channel terminal: the channel runs between drain and source.
    S
    The source (S) is the channel terminal joined to the body in the three-terminal form shown here, so the controlling gate voltage is applied between gate and source.

Also drawn on the diode sheet

Also drawn on the transistor sheet

Switches and relays

6 symbols

  1. Switch (SPST)

    Designator S

    US
    IEC

    Switch (SPST) circuit symbol, US (IEEE 315 style), terminals 1, 2 US SVG Switch (SPST) circuit symbol, IEC 60617 style, terminals 1, 2 IEC SVG

    A switch symbol stands for a contact that either completes or breaks a path.

    Terminals 1, 2
    1, 2
    A single-pole, single-throw (SPST) switch has two terminals. Their left or right position on the page does not give them different electrical roles.

  2. Push button, normally open

    Designator S

    US
    IEC

    Push button, normally open circuit symbol, US (IEEE 315 style), terminals 1, 2 US SVG Push button, normally open circuit symbol, IEC 60617 style, terminals 1, 2 IEC SVG

    The momentary push buttons shown here change contact state while pressed and return to their drawn, unactuated state when released.

    Terminals 1, 2
    1, 2
    A single-pole, single-throw (SPST) switch has two terminals. Their left or right position on the page does not give them different electrical roles.

  3. Switch (SPDT)

    Designator S

    US
    IEC

    Switch (SPDT) circuit symbol, US (IEEE 315 style), terminals COM, 1, 2 US SVG Switch (SPDT) circuit symbol, IEC 60617 style, terminals COM, 1, 2 IEC SVG

    Poles count the separate circuits a switch controls; throws count the contact destinations available to each pole. An off position is not an additional throw.

    Terminals COM, 1, 2
    COM
    In a double-throw switch the common terminal is the one the moving arm belongs to.
    1, 2
    Each throw terminal is one of the positions the arm can connect the common terminal to.

  4. Relay (coil and SPDT contact)

    Designator K

    US
    IEC

    Relay (coil and SPDT contact) circuit symbol, US (IEEE 315 style), terminals COM, NC, NO, A1, A2 US SVG Relay (coil and SPDT contact) circuit symbol, IEC 60617 style, terminals COM, NC, NO, A1, A2 IEC SVG

    The electromechanical relay shown here uses a coil to move contacts. Its coil circuit is electrically separate from the switched contact circuit.

    Terminals COM, NC, NO, A1, A2
    COM
    COM is the common contact, the one the moving arm belongs to.
    NC
    NC is the normally-closed contact: it is connected to COM in the resting, de-energised state of the single-stable relay shown here.
    NO
    NO is the normally-open contact: it is disconnected from COM at rest and connected after the coil has energised the single-stable relay shown here.
    A1, A2
    The two coil terminals are the control side of the relay; the current that flows through them moves the contacts.

Also drawn on the switch sheet

Protection

2 symbols

  1. Fuse

    Designator F

    US
    IEC

    Fuse circuit symbol, US (IEEE 315 style), terminals 1, 2 US SVG Fuse circuit symbol, IEC 60617 style, terminals 1, 2 IEC SVG

    A fuse opens a conducting link when sufficient overcurrent heats the link until it melts.

    Terminals 1, 2
    1, 2
    The simple fuse-link symbol shown here has two terminals and no polarity mark.
    Try the inputs

  2. Circuit breaker

    Designator CB

    Same in US and IEC style

    Circuit breaker circuit symbol, drawn the same in US and IEC style, terminals 1, 2 SVG Circuit breaker circuit symbol, drawn the same in US and IEC style, terminals 1, 2 SVG

    The overcurrent circuit breaker represented here opens its contacts automatically on overcurrent and can be reset.

    Terminals 1, 2
    1, 2
    This symbol has two terminals and no polarity mark. The labels 1 and 2 only tell the two ends apart.

Voltage and current sources

5 symbols

  1. Cell

    Same in US and IEC style

    Cell circuit symbol, drawn the same in US and IEC style, terminals +, − SVG Cell circuit symbol, drawn the same in US and IEC style, terminals +, − SVG

    In a cell symbol the long thin line is the positive terminal and the short thick line is the negative terminal.

    Terminals +, −
    +
    The + mark identifies the higher-potential terminal relative to the − terminal. The polarity marks alone do not determine whether current is entering or leaving the source.
    −
    The − mark identifies the lower-potential terminal relative to the + terminal. It is not automatically the circuit's zero-volt reference.

  2. Battery

    Designator BT

    Same in US and IEC style

    Battery circuit symbol, drawn the same in US and IEC style, terminals +, − SVG Battery circuit symbol, drawn the same in US and IEC style, terminals +, − SVG

    A battery is drawn as several cells in a row; the terminals follow the same long-positive rule.

    Terminals +, −
    +
    The + mark identifies the higher-potential terminal relative to the − terminal. The polarity marks alone do not determine whether current is entering or leaving the source.
    −
    The − mark identifies the lower-potential terminal relative to the + terminal. It is not automatically the circuit's zero-volt reference.

  3. DC voltage source

    Same in US and IEC style

    DC voltage source circuit symbol, drawn the same in US and IEC style, terminals +, − SVG DC voltage source circuit symbol, drawn the same in US and IEC style, terminals +, − SVG

    The generic DC voltage-source drawing used in both views is a circle with + and − signs. An ideal voltage source fixes the voltage difference between those terminals.

    Terminals +, −
    +
    The + mark identifies the higher-potential terminal relative to the − terminal. The polarity marks alone do not determine whether current is entering or leaving the source.
    −
    The − mark identifies the lower-potential terminal relative to the + terminal. It is not automatically the circuit's zero-volt reference.

  4. AC source

    Same in US and IEC style

    AC source circuit symbol, drawn the same in US and IEC style, terminals 1, 2 SVG AC source circuit symbol, drawn the same in US and IEC style, terminals 1, 2 SVG

    The sinusoidal AC voltage-source drawing used here is a circle with a sine wave inside.

    Terminals 1, 2
    1, 2
    The sinusoidal AC voltage source shown here alternates its polarity between its two terminals; neither terminal is permanently positive.

  5. Current source

    Same in US and IEC style

    Current source circuit symbol, drawn the same in US and IEC style, terminals 1, 2 SVG Current source circuit symbol, drawn the same in US and IEC style, terminals 1, 2 SVG

    The generic current-source drawing used in both views is a circle with an arrow giving conventional current direction. An ideal current source fixes that current; the arrow does not give voltage polarity.

    Terminals 1, 2
    1
    Conventional current enters the ideal current source at the tail end of its arrow; this does not specify that terminal's voltage polarity.
    2
    Conventional current leaves the ideal current source at the arrowhead end; this does not specify that terminal's voltage polarity.

Ground and reference

3 symbols

  1. Earth ground

    Same in US and IEC style

    Earth ground circuit symbol, drawn the same in US and IEC style, terminals 1 SVG Earth ground circuit symbol, drawn the same in US and IEC style, terminals 1 SVG

    In the convention used here, three horizontal lines of decreasing length identify a connection to earth. Check a drawing's legend: the same shape is sometimes used more generally for circuit ground.

    Terminals 1
    1
    Each ground or reference symbol shown here has one connection point to the circuit; it identifies a reference connection, not a two-terminal component.

  2. Chassis ground

    Same in US and IEC style

    Chassis ground circuit symbol, drawn the same in US and IEC style, terminals 1 SVG Chassis ground circuit symbol, drawn the same in US and IEC style, terminals 1 SVG

    The chassis symbol (hatched) marks a connection to the equipment's metal frame or enclosure.

    Terminals 1
    1
    Each ground or reference symbol shown here has one connection point to the circuit; it identifies a reference connection, not a two-terminal component.

  3. Signal reference (common)

    Same in US and IEC style

    Signal reference (common) circuit symbol, drawn the same in US and IEC style, terminals 1 SVG Signal reference (common) circuit symbol, drawn the same in US and IEC style, terminals 1 SVG

    The signal-reference symbol marks the chosen zero-volt reference for circuit voltages. It need not be connected to earth or chassis.

    Terminals 1
    1
    Each ground or reference symbol shown here has one connection point to the circuit; it identifies a reference connection, not a two-terminal component.

Wires and junctions

2 symbols

  1. Wire junction

    Same in US and IEC style

    Wire junction circuit symbol, drawn the same in US and IEC style SVG Wire junction circuit symbol, drawn the same in US and IEC style SVG

    In the drawing convention used here, a dot marks a wire connection and a plain four-way crossing without a dot is not connected. Older drawings may use another convention, so check their legend.

  2. Wires crossing, not connected

    Same in US and IEC style

    Wires crossing, not connected circuit symbol, drawn the same in US and IEC style SVG Wires crossing, not connected circuit symbol, drawn the same in US and IEC style SVG

    In the newer convention used here, wires that cross with no dot are not connected. Older schematics drew connected wires as a plain crossing and made unconnected wires hop over each other with a small half-circle, so check a drawing's legend.

Logic

6 symbols

  1. AND gate

    US
    IEC

    AND gate circuit symbol, US (IEEE 315 style), terminals A, B, Y US SVG AND gate circuit symbol, IEC 60617 style, terminals A, B, Y IEC SVG

    An AND gate's output is 1 only when every input is 1.

    Terminals A, B, Y
    A, B
    In the unrotated gate drawings here, inputs appear on the left. Each input is a logic value, 0 or 1; rotating the symbol does not turn an input into an output.
    Y
    In the unrotated gate drawings here, the output appears on the right. Its settled logic value follows the gate's truth table.
    Try the inputs

  2. OR gate

    US
    IEC

    OR gate circuit symbol, US (IEEE 315 style), terminals A, B, Y US SVG OR gate circuit symbol, IEC 60617 style, terminals A, B, Y IEC SVG

    An OR gate's output is 1 when any input is 1.

    Terminals A, B, Y
    A, B
    In the unrotated gate drawings here, inputs appear on the left. Each input is a logic value, 0 or 1; rotating the symbol does not turn an input into an output.
    Y
    In the unrotated gate drawings here, the output appears on the right. Its settled logic value follows the gate's truth table.
    Try the inputs

  3. NOT gate

    US
    IEC

    NOT gate circuit symbol, US (IEEE 315 style), terminals A, Y US SVG NOT gate circuit symbol, IEC 60617 style, terminals A, Y IEC SVG

    A NOT gate's output is the opposite of its input.

    Terminals A, Y
    A
    In the unrotated gate drawings here, inputs appear on the left. Each input is a logic value, 0 or 1; rotating the symbol does not turn an input into an output.
    Y
    In the unrotated gate drawings here, the output appears on the right. Its settled logic value follows the gate's truth table.
    Try the inputs

  4. NAND gate

    US
    IEC

    NAND gate circuit symbol, US (IEEE 315 style), terminals A, B, Y US SVG NAND gate circuit symbol, IEC 60617 style, terminals A, B, Y IEC SVG

    A NAND gate's output is 0 only when every input is 1.

    Terminals A, B, Y
    A, B
    In the unrotated gate drawings here, inputs appear on the left. Each input is a logic value, 0 or 1; rotating the symbol does not turn an input into an output.
    Y
    In the unrotated gate drawings here, the output appears on the right. Its settled logic value follows the gate's truth table.
    Try the inputs

  5. NOR gate

    US
    IEC

    NOR gate circuit symbol, US (IEEE 315 style), terminals A, B, Y US SVG NOR gate circuit symbol, IEC 60617 style, terminals A, B, Y IEC SVG

    A NOR gate's output is 1 only when every input is 0.

    Terminals A, B, Y
    A, B
    In the unrotated gate drawings here, inputs appear on the left. Each input is a logic value, 0 or 1; rotating the symbol does not turn an input into an output.
    Y
    In the unrotated gate drawings here, the output appears on the right. Its settled logic value follows the gate's truth table.
    Try the inputs

  6. XOR gate

    US
    IEC

    XOR gate circuit symbol, US (IEEE 315 style), terminals A, B, Y US SVG XOR gate circuit symbol, IEC 60617 style, terminals A, B, Y IEC SVG

    An exclusive-OR gate's output is 1 when its two inputs differ.

    Terminals A, B, Y
    A, B
    In the unrotated gate drawings here, inputs appear on the left. Each input is a logic value, 0 or 1; rotating the symbol does not turn an input into an output.
    Y
    In the unrotated gate drawings here, the output appears on the right. Its settled logic value follows the gate's truth table.
    Try the inputs

Meters

2 symbols

  1. Voltmeter

    Same in US and IEC style

    Voltmeter circuit symbol, drawn the same in US and IEC style, terminals +, − SVG Voltmeter circuit symbol, drawn the same in US and IEC style, terminals +, − SVG

    A voltmeter is drawn as a circle with a V and is connected across (in parallel with) the part it measures.

    Terminals +, −
    +
    The + terminal marks the side a DC meter expects to be positive: its reading is positive when this terminal is at the higher potential.
    −
    The − terminal is the meter's other side. A DC meter reads positive when the + terminal is at a higher potential than this one.

  2. Ammeter

    Same in US and IEC style

    Ammeter circuit symbol, drawn the same in US and IEC style, terminals +, − SVG Ammeter circuit symbol, drawn the same in US and IEC style, terminals +, − SVG

    An ammeter is drawn as a circle with an A and is connected in line with (in series with) the current it measures.

    Terminals +, −
    +
    The + terminal marks the side a DC meter expects to be positive: its reading is positive when this terminal is at the higher potential.
    −
    The − terminal is the meter's other side. A DC meter reads positive when the + terminal is at a higher potential than this one.

Outputs and loads

2 symbols

  1. Lamp

    Designator DS

    Same in US and IEC style

    Lamp circuit symbol, drawn the same in US and IEC style, terminals 1, 2 SVG Lamp circuit symbol, drawn the same in US and IEC style, terminals 1, 2 SVG

    The incandescent-lamp convention used on this sheet is a circle with a cross inside.

    Terminals 1, 2
    1, 2
    This symbol has two terminals and no polarity mark. The labels 1 and 2 only tell the two ends apart.

  2. Motor

    Same in US and IEC style

    Motor circuit symbol, drawn the same in US and IEC style, terminals 1, 2 SVG Motor circuit symbol, drawn the same in US and IEC style, terminals 1, 2 SVG

    One common motor convention is a circle containing M; this sheet uses that form.

    Terminals 1, 2
    1, 2
    This symbol has two terminals and no polarity mark. The labels 1 and 2 only tell the two ends apart.

What changes between US and IEC

22 of the 41 symbols on the chart are drawn differently in the two styles, so the chart shows both. The table names what changes. The other 19 are drawn the same.

How each symbol's US and IEC drawings differ, part 1 of 2
Symbol US style IEC style
Resistor Zigzag Rectangle
Variable resistor Zigzag with arrow through Rectangle with arrow through
Potentiometer Zigzag with wiper arrow Rectangle with wiper arrow
Thermistor Zigzag with bent line through Rectangle with bent line through
LDR (light-dependent resistor) Zigzag with arrows arriving Rectangle with arrows arriving
Polarised (polarized) capacitor Curved negative plate Hollow positive plate
Inductor Looped coil Humps
Transformer Windings as loops Windings as arcs
NPN transistor With envelope Without envelope
PNP transistor With envelope Without envelope
N-channel MOSFET With envelope Without envelope
How each symbol's US and IEC drawings differ, part 2 of 2
Symbol US style IEC style
Switch (SPST) Contact circles Bare line ends
Push button, normally open Contact circles Bare line ends
Switch (SPDT) Contact circles Bare line ends
Relay (coil and SPDT contact) Coil as loops Coil as a rectangle
Fuse S-shaped link Conductor through a box
AND gate Distinctive shape Rectangle with &
OR gate Distinctive shape Rectangle with ≥1
NOT gate Triangle with output circle Rectangle with 1 and output circle
NAND gate Distinctive shape with output circle Rectangle with & and output circle
NOR gate Distinctive shape with output circle Rectangle with ≥1 and output circle
XOR gate Distinctive shape with a second input curve Rectangle with =1

Drawn the same in US and IEC style

Symbols that look alike

Each figure rings the one mark that tells the drawings apart.

  • Resistor symbol in IEC style; ringed: plain rectangle

    Resistor

    Plain rectangle

  • Fuse symbol in IEC style; ringed: A line running through it

    Fuse

    A line running through it

  • Relay (coil and SPDT contact) symbol in IEC style; ringed: dashed line to a contact

    Relay (coil and SPDT contact)

    Dashed line to a contact

Three IEC symbols are rectangles: a plain rectangle is a resistor, a rectangle with a line running through it end to end is a fuse, and a rectangle joined by a dashed line to a contact is a relay coil.⁠Source 2Source 8Source 24

Fig. 2 — Resistor, fuse and relay (coil and SPDT contact), the mark that tells them apart ringed
  • AND gate symbol in US style; ringed: straight input side, rounded front

    AND gate

    Straight input side, rounded front

  • OR gate symbol in US style; ringed: curved input side, pointed front

    OR gate

    Curved input side, pointed front

AND and OR differ in outline: the US AND shape has a straight input side and a rounded front, and the OR shape has a curved input side and a pointed front. In IEC boxes, & marks AND and ≥1 marks OR.⁠Source 31Source 34

  • AND gate symbol in IEC style; ringed: &

    AND gate

    &

  • OR gate symbol in IEC style; ringed: ≥1

    OR gate

    ≥1

AND and OR differ in outline: the US AND shape has a straight input side and a rounded front, and the OR shape has a curved input side and a pointed front. In IEC boxes, & marks AND and ≥1 marks OR.⁠Source 31Source 34

Fig. 3 — AND gate and OR gate, the mark that tells them apart ringedAND gate and OR gate, the mark that tells them apart ringed
  • XOR gate symbol in US style; ringed: second curved line

    XOR gate

    Second curved line

  • OR gate symbol in US style

    OR gate

XOR differs from OR by one mark: in the US shape a second curved line runs across the inputs, and in the IEC box =1 replaces ≥1.⁠Source 31Source 35

  • XOR gate symbol in IEC style; ringed: =1

    XOR gate

    =1

  • OR gate symbol in IEC style; ringed: ≥1

    OR gate

    ≥1

XOR differs from OR by one mark: in the US shape a second curved line runs across the inputs, and in the IEC box =1 replaces ≥1.⁠Source 31Source 35

Fig. 4 — XOR gate and OR gate, the mark that tells them apart ringedXOR gate and OR gate, the mark that tells them apart ringed
  • NOT gate symbol in US style; ringed: circle on the output

    NOT gate

    Circle on the output

  • NAND gate symbol in US style; ringed: circle on the output

    NAND gate

    Circle on the output

  • NOR gate symbol in US style; ringed: circle on the output

    NOR gate

    Circle on the output

  • AND gate symbol in US style

    AND gate

  • OR gate symbol in US style

    OR gate

NAND and NOR are the AND and OR shapes with a small circle on the output, and NOT is a triangle with that circle. In IEC boxes the same circle sits on the output. The circle marks inversion.⁠Source 31Source 36Source 37

  • NOT gate symbol in IEC style; ringed: circle on the output

    NOT gate

    Circle on the output

  • NAND gate symbol in IEC style; ringed: circle on the output

    NAND gate

    Circle on the output

  • NOR gate symbol in IEC style; ringed: circle on the output

    NOR gate

    Circle on the output

  • AND gate symbol in IEC style

    AND gate

  • OR gate symbol in IEC style

    OR gate

NAND and NOR are the AND and OR shapes with a small circle on the output, and NOT is a triangle with that circle. In IEC boxes the same circle sits on the output. The circle marks inversion.⁠Source 31Source 36Source 37

Fig. 5 — NOT gate, NAND gate, NOR gate, AND gate and OR gate, the mark that tells them apart ringedNOT gate, NAND gate, NOR gate, AND gate and OR gate, the mark that tells them apart ringed
  • Wire junction symbol; ringed: the dot, with the ringed part enlarged 3:1 in a detail view

    Wire junction

    The dot

  • Wires crossing, not connected symbol, with the ringed part enlarged 3:1 in a detail view

    Wires crossing, not connected

Wires that meet in a T are connected whether or not a dot is drawn there. Where four wires cross and connect, the dot is what shows it.⁠Source 29

Fig. 6 — Wire junction and wires crossing, not connected, the mark that tells them apart ringed
  • Voltmeter symbol; ringed: V

    Voltmeter

    V

  • Ammeter symbol; ringed: A

    Ammeter

    A

  • Lamp symbol; a leader points to: cross

    Lamp

  • Motor symbol; ringed: M

    Motor

    M

Several symbols are circles told apart by what is inside: V for a voltmeter, A for an ammeter, a cross for a lamp and M for a motor.⁠Source 20Source 32Source 33

Fig. 7 — Voltmeter, ammeter, lamp and motor, the mark that tells them apart pointed out

Marks a symbol adds

  • Variable resistor symbol, US style, one mark ringed. Arrow through says adjustable

    Variable resistor

    Arrow through: adjustable

  • Potentiometer symbol, US style, one mark ringed. Arrow that stops on the body says a wiper

    Potentiometer

    Arrow that stops on the body: a wiper

  • Thermistor symbol, US style, one mark ringed. Short flat foot says resistance that changes with temperature

    Thermistor

    Short flat foot: resistance that changes with temperature

  • Light-emitting diode symbol, US style, one mark ringed. Arrows leaving says light-emitting

    Light-emitting diode

    Arrows leaving: light-emitting

  • Photodiode symbol, US style, one mark ringed. Arrows arriving says a photodiode

    Photodiode

    Arrows arriving: a photodiode

  • Iron-core inductor symbol, US style, one mark ringed. Solid parallel core lines says iron

    Iron-core inductor

    Solid parallel core lines: iron

  • Transformer symbol, US style, one mark ringed. Dots says corresponding voltage polarity

    Transformer

    Dots: corresponding voltage polarity

  • Relay (coil and SPDT contact) symbol, US style, one mark ringed. Dashed line says a mechanical link

    Relay (coil and SPDT contact)

    Dashed line: a mechanical link

  • Variable resistor symbol, IEC style, one mark ringed. Arrow through says adjustable

    Variable resistor

    Arrow through: adjustable

  • Potentiometer symbol, IEC style, one mark ringed. Arrow that stops on the body says a wiper

    Potentiometer

    Arrow that stops on the body: a wiper

  • Thermistor symbol, IEC style, one mark ringed. Short flat foot says resistance that changes with temperature

    Thermistor

    Short flat foot: resistance that changes with temperature

  • Light-emitting diode symbol, IEC style, one mark ringed. Arrows leaving says light-emitting

    Light-emitting diode

    Arrows leaving: light-emitting

  • Photodiode symbol, IEC style, one mark ringed. Arrows arriving says a photodiode

    Photodiode

    Arrows arriving: a photodiode

  • Iron-core inductor symbol, IEC style, one mark ringed. Solid parallel core lines says iron

    Iron-core inductor

    Solid parallel core lines: iron

  • Transformer symbol, IEC style, one mark ringed. Dots says corresponding voltage polarity

    Transformer

    Dots: corresponding voltage polarity

  • Relay (coil and SPDT contact) symbol, IEC style, one mark ringed. Dashed line says a mechanical link

    Relay (coil and SPDT contact)

    Dashed line: a mechanical link

Fig. 8 — Marks a symbol adds, each ringed, with what it says about the part, US styleMarks a symbol adds, each ringed, with what it says about the part, IEC style ⁠Source 4Source 5Source 6Source 14Source 38Source 39Source 40

Fuse and logic gates, part by part

These symbols have no sheet of their own yet: their parts, then their inputs to try.

  • Fuse symbol in US style, with numbered leaders to the curved link

    US style

  • Fuse symbol in IEC style, with numbered leaders to the rectangle and the conductor

    IEC style

1 Curved link
2 Rectangle
3 Conductor
The two fuse forms used here are a curved link in the US view and a rectangle with a conductor through it in the IEC view. Both identify a fuse.⁠Source 8
Fig. 9 — Fuse symbol in US style and IEC style, its marks numbered
  • AND gate symbol in US style, with numbered leaders to the straight input side and the rounded front
1 Straight input side
2 Rounded front
AND and OR differ in outline: the US AND shape has a straight input side and a rounded front, and the OR shape has a curved input side and a pointed front. In IEC boxes, & marks AND and ≥1 marks OR.⁠Source 31Source 34
  • AND gate symbol in IEC style, with numbered leaders to the & sign
1 &
AND and OR differ in outline: the US AND shape has a straight input side and a rounded front, and the OR shape has a curved input side and a pointed front. In IEC boxes, & marks AND and ≥1 marks OR.⁠Source 31Source 34
Fig. 10 — AND gate symbol, US style, its marks numberedAND gate symbol, IEC style, its marks numbered

Fuse: try the states

Fuse 2 states
open
12
Fuse, link intact: One node Fuse, link blown: No path
open
12
Fuse, link intact: One node Fuse, link blown: No path
Link

One node. Under the ideal fuse-link model, an intact fuse joins its two terminals with zero resistance, so they have the same potential.

No path. Under the ideal fuse-link model, a blown fuse has an open link and no conducting path through it. The printed symbol remains unchanged.

A fuse opens a conducting link when sufficient overcurrent heats the link until it melts.

Logic gates: try the inputs

AND gate 4 states
000
010
100
111
ABY
AND gate, A 0, B 0: Y = 0 AND gate, A 0, B 1: Y = 0 AND gate, A 1, B 0: Y = 0 AND gate, A 1, B 1: Y = 1
000
010
100
111
ABY
AND gate, A 0, B 0: Y = 0 AND gate, A 0, B 1: Y = 0 AND gate, A 1, B 0: Y = 0 AND gate, A 1, B 1: Y = 1
A
B

Y = 0. Under the two-input truth-table model, AND gives 0 when at least one input is 0.

Y = 0. Under the two-input truth-table model, AND gives 0 when at least one input is 0.

Y = 0. Under the two-input truth-table model, AND gives 0 when at least one input is 0.

Y = 1. Under the two-input truth-table model, AND gives 1 when both inputs are 1.

In the unrotated gate drawings here, the output appears on the right. Its settled logic value follows the gate's truth table.

Truth table for AND gate; the current row is marked
AB Output Current row
00 Y = 0
01 Y = 0
10 Y = 0
11 Y = 1
NAND gate 4 states
001
011
101
110
ABY
NAND gate, A 0, B 0: Y = 1 NAND gate, A 0, B 1: Y = 1 NAND gate, A 1, B 0: Y = 1 NAND gate, A 1, B 1: Y = 0
001
011
101
110
ABY
NAND gate, A 0, B 0: Y = 1 NAND gate, A 0, B 1: Y = 1 NAND gate, A 1, B 0: Y = 1 NAND gate, A 1, B 1: Y = 0
A
B

Y = 1. Under the two-input truth-table model, NAND gives 1 when at least one input is 0.

Y = 1. Under the two-input truth-table model, NAND gives 1 when at least one input is 0.

Y = 1. Under the two-input truth-table model, NAND gives 1 when at least one input is 0.

Y = 0. Under the two-input truth-table model, NAND gives 0 when both inputs are 1.

In the gate conventions used here, a small output circle marks logical negation: it reverses the output's 0 or 1 value.

Truth table for NAND gate; the current row is marked
AB Output Current row
00 Y = 1
01 Y = 1
10 Y = 1
11 Y = 0
NOR gate 4 states
001
010
100
110
ABY
NOR gate, A 0, B 0: Y = 1 NOR gate, A 0, B 1: Y = 0 NOR gate, A 1, B 0: Y = 0 NOR gate, A 1, B 1: Y = 0
001
010
100
110
ABY
NOR gate, A 0, B 0: Y = 1 NOR gate, A 0, B 1: Y = 0 NOR gate, A 1, B 0: Y = 0 NOR gate, A 1, B 1: Y = 0
A
B

Y = 1. Under the two-input truth-table model, NOR gives 1 when both inputs are 0.

Y = 0. Under the two-input truth-table model, NOR gives 0 when at least one input is 1.

Y = 0. Under the two-input truth-table model, NOR gives 0 when at least one input is 1.

Y = 0. Under the two-input truth-table model, NOR gives 0 when at least one input is 1.

In the gate conventions used here, a small output circle marks logical negation: it reverses the output's 0 or 1 value.

Truth table for NOR gate; the current row is marked
AB Output Current row
00 Y = 1
01 Y = 0
10 Y = 0
11 Y = 0
NOT gate 2 states
01
10
AY
NOT gate, A 0: Y = 1 NOT gate, A 1: Y = 0
01
10
AY
NOT gate, A 0: Y = 1 NOT gate, A 1: Y = 0
A

Y = 1. Under the one-input truth-table model, NOT gives 1 when its input is 0.

Y = 0. Under the one-input truth-table model, NOT gives 0 when its input is 1.

In the gate conventions used here, a small output circle marks logical negation: it reverses the output's 0 or 1 value.

Truth table for NOT gate; the current row is marked
A Output Current row
0 Y = 1
1 Y = 0
OR gate 4 states
000
011
101
111
ABY
OR gate, A 0, B 0: Y = 0 OR gate, A 0, B 1: Y = 1 OR gate, A 1, B 0: Y = 1 OR gate, A 1, B 1: Y = 1
000
011
101
111
ABY
OR gate, A 0, B 0: Y = 0 OR gate, A 0, B 1: Y = 1 OR gate, A 1, B 0: Y = 1 OR gate, A 1, B 1: Y = 1
A
B

Y = 0. Under the two-input truth-table model, OR gives 0 when both inputs are 0.

Y = 1. Under the two-input truth-table model, OR gives 1 when at least one input is 1.

Y = 1. Under the two-input truth-table model, OR gives 1 when at least one input is 1.

Y = 1. Under the two-input truth-table model, OR gives 1 when at least one input is 1.

In the unrotated gate drawings here, the output appears on the right. Its settled logic value follows the gate's truth table.

Truth table for OR gate; the current row is marked
AB Output Current row
00 Y = 0
01 Y = 1
10 Y = 1
11 Y = 1
XOR gate 4 states
000
011
101
110
ABY
XOR gate, A 0, B 0: Y = 0 XOR gate, A 0, B 1: Y = 1 XOR gate, A 1, B 0: Y = 1 XOR gate, A 1, B 1: Y = 0
000
011
101
110
ABY
XOR gate, A 0, B 0: Y = 0 XOR gate, A 0, B 1: Y = 1 XOR gate, A 1, B 0: Y = 1 XOR gate, A 1, B 1: Y = 0
A
B

Y = 0. Under the two-input truth-table model, XOR gives 0 when the inputs are equal.

Y = 1. Under the two-input truth-table model, XOR gives 1 when the inputs differ.

Y = 1. Under the two-input truth-table model, XOR gives 1 when the inputs differ.

Y = 0. Under the two-input truth-table model, XOR gives 0 when the inputs are equal.

In the unrotated gate drawings here, the output appears on the right. Its settled logic value follows the gate's truth table.

Truth table for XOR gate; the current row is marked
AB Output Current row
00 Y = 0
01 Y = 1
10 Y = 1
11 Y = 0

Printing gives the view on screen, chart or details, in both drawing styles and without the find bar. To keep a PDF, choose Save as PDF in your print dialog. For one family, labelled or blank, use the worksheets.

Worksheets

Chart of 41 circuit symbols in US and IEC style side by side, grouped as on the legend, each named

Open the full sheet (SVG) Download PNG, 2400 px

Fig. 11 — Circuit symbols chart, US and IEC style

One style only: US chart (SVG) or IEC chart (SVG). The US and IEC comparison as one sheet: SVG or PNG, 2400 px.

A–Z index

0–9ABCDEFGILMNOPRSTUVWXZ

52 symbols and 51 other names

0–9

A

B

C

D

E

F

G

I

L

M

N

O

P

R

S

T

U

V

W

X

Z

How to use a legend

Five questions on reading a legend

  1. Match the shape

    Look at the outline first, then at the small marks inside it: an arrow, a bar, a dot, a letter. The chart groups symbols by what they do, and the find bar also takes shape words such as zigzag, rectangle or loop.

  2. Read the letter beside it

    Reference designators identify parts with class letters and a number. Common letters used here are R resistor, C capacitor, D diode, Q transistor, L inductor, T transformer, S switch, K relay and F fuse; other naming systems exist.⁠Source 7

  3. Check how the drawing shows connections

    The junction and crossing cells show the dot convention used here. A small half-circle hop where one wire passes over another also means the wires are not connected. Some drawings put a hop at every unconnected crossing and a dot at every connection, so neither is left to guess.⁠Source 6Source 29Source 40

  4. Tell parts from nodes

    A ground or reference symbol marks a connection to the circuit's common reference, not a part, so the drawings here give it no reference designator. A label such as GND or 0 V names that node instead.⁠Source 5Source 7Source 26

  5. Keep the symbol and the part apart

    A schematic symbol shows how terminals connect, not where they are on a real part. Terminal letters such as E, B and C or A and K do not give lead order or package layout; the part's own documentation does.⁠Source 21Source 29Source 41

Questions

Why do some symbols have two drawing forms?
Two drawing conventions are in common use. A resistor may be a US-style zigzag or an IEC-style rectangle; it is the same component with the same terminals either way.⁠Source 1Source 2Source 3Source 4Source 5
Does turning a symbol round change the component?
No. Rotating or mirroring the whole drawing, with its terminal labels and connections moving with it, leaves the component and its terminal roles as they were.⁠Source 29

Sources

41 sources, numbered as cited
  1. IEEE 315-1975 — historical standard status

    IEEE Standards Association, retrieved 2026-09-22. Inactive-Reserved Standard

  2. ModEL — Components and Symbols, §§3.4–3.6 (NEMA and IEC symbol families, pp. 11–13)

    Tony R. Kuphaldt, retrieved 2026-09-23. Two major divisions of symbology exist: the American NEMA (National Electrical Manufacturers Association) and the European IEC

  3. IEC 60617:2026 DB — Graphical symbols for diagrams

    International Electrotechnical Commission, retrieved 2026-09-22.

  4. ModEL — Components and Symbols, §§3.6–3.7 (resistors and potentiometers, pp. 13–14)

    Tony R. Kuphaldt, retrieved 2026-09-22.

  5. DC Electrical Circuit Analysis — resistive devices and schematic ground symbols (pp. 53, 59–64)

    James M. Fiore, Mohawk Valley Community College, retrieved 2026-09-22.

  6. Lessons In Electric Circuits, Vol. V — §9, Circuit Schematic Symbols (pp. 130–139)

    Tony R. Kuphaldt, retrieved 2026-09-22.

  7. Design to Manufacturing Standards — Reference Designators (slide 33)

    Dieter Bergman, IPC, retrieved 2026-09-22. BT battery … CB circuit breaker … DS display, lamp, light emitting diode … RT thermistor

  8. ModEL — Components and Symbols, §3.10 (fuses and circuit breakers, p. 20)

    Tony R. Kuphaldt, retrieved 2026-09-22.

  9. ModEL — Components and Symbols, §3.11 (relay example with motor and lamp loads, p. 22)

    Tony R. Kuphaldt, retrieved 2026-09-23. the relay in turn controls the flow of electric current from two other sources, to two other loads

  10. Thermistors — NTC and PTC product-description definitions

    Murata Manufacturing, retrieved 2026-09-22.

  11. ModEL — Components and Symbols, §3.15 (capacitor polarity, pp. 27–28)

    Tony R. Kuphaldt, retrieved 2026-09-22.

  12. University Physics, Vol. 2, §8.1 — capacitor representations, Figure 8.9

    OpenStax, Rice University, retrieved 2026-09-22.

  13. ModEL — Inductors and Inductive Circuits, §§3.1–3.2 (current change and polarity)

    Tony R. Kuphaldt, retrieved 2026-09-22.

  14. ModEL — Transformers, §§4.1, 4.3–4.4 (windings, centre taps, autotransformers and dots)

    Tony R. Kuphaldt, retrieved 2026-09-22.

  15. ModEL — Components and Symbols, §§3.13–3.14 (inductors and transformers, pp. 24–26)

    Tony R. Kuphaldt, retrieved 2026-09-22.

  16. ModEL — PN Junctions and Diodes, §§2.3–2.7 (bias and diode variants)

    Tony R. Kuphaldt, retrieved 2026-09-22.

  17. Diodes — terminal polarity, ideal and offset models (pp. 1–2, 7–10)

    MIT OpenCourseWare — Chaniotakis and Cory, retrieved 2026-09-22.

  18. ModEL — Bipolar Junction Transistors, simplified tutorial and §4.2 (terminal roles)

    Tony R. Kuphaldt, retrieved 2026-09-22.

  19. ModEL — Field-Effect Transistors, §4.3 and §6.2 (body, channel and symbol alternatives)

    Tony R. Kuphaldt, retrieved 2026-09-22.

  20. ModEL — Electrical Switches, §§3.1–3.3 (pp. 16–19)

    Tony R. Kuphaldt, retrieved 2026-09-22.

  21. ModEL — Electromechanical Relays, §§3.2–3.3 and §5.1 (normal and present contact status)

    Tony R. Kuphaldt, retrieved 2026-09-22.

  22. Relay technology — structure, operation and contact forms

    Omron, retrieved 2026-09-22.

  23. AT121 course notes — Relays: ISO relay contact numbers

    Community College of Philadelphia (D. Reed), reproducing with permission an MG Car Club article by Rick Astley, retrieved 2026-09-23. 85 Coil Low 86 Coil High 87 NO contact 87A NC contact 30* Common

  24. ModEL — Components and Symbols, §3.11 (relay symbol, p. 21)

    Tony R. Kuphaldt, retrieved 2026-09-23. The schematic diagram symbol for a relay (shown on the left) is a combination of symbols – a solenoid shown mechanically linked to a switch.

  25. ModEL — Components and Symbols, §3.5 (cells and ideal source symbols, p. 12)

    Tony R. Kuphaldt, retrieved 2026-09-22.

  26. ModEL — Sources and Loads, Voltmeters and Ammeters, §§4.2–4.6 and §6.2

    Tony R. Kuphaldt, retrieved 2026-09-22.

  27. Chassis, Earth and Signal Grounding: Terminology and Symbols

    NI, retrieved 2026-09-22.

  28. Where Is Ground? — local reference versus earth

    Analog Devices, retrieved 2026-09-22.

  29. Electrical Schematics, §§1.3.1–1.3.5 — nodes, crossings, references and congruent drawings

    Tufts University, retrieved 2026-09-22.

  30. ModEL — Semiconductor Logic Gates, §3.1 (truth tables, pp. 34–35)

    Tony R. Kuphaldt, retrieved 2026-09-22.

  31. Overview of IEEE Standard 91-1984 — Explanation of Logic Symbols, §§2–3 (pp. 2–5)

    Texas Instruments, retrieved 2026-09-22.

  32. ModEL — Components and Symbols, §§3.2–3.3 (meters in series and parallel, pp. 8–11)

    Tony R. Kuphaldt, retrieved 2026-09-22.

  33. Combined Science: Synergy, June 2022 paper — motor symbol (p. 47)

    AQA, retrieved 2026-09-22.

  34. Lessons In Electric Circuits, Vol. IV — §§3.4.1–3.4.3, AND and OR gate symbols (pp. 49–52)

    Tony R. Kuphaldt, retrieved 2026-09-23. Each basic gate type will be presented in this section, showing its standard symbol, truth table, and practical operation.

  35. Lessons In Electric Circuits, Vol. IV — §3.4.7, Exclusive-OR gate symbol (pp. 57–58)

    Tony R. Kuphaldt, retrieved 2026-09-23. The Exclusive-OR (sometimes called XOR) gate has both a symbol and a truth table pattern that is unique

  36. Lessons In Electric Circuits, Vol. IV — §§3.2–3.4, the inversion bubble on gate symbols (pp. 31, 51)

    Tony R. Kuphaldt, retrieved 2026-09-23. To symbolize this output signal inversion, the NAND gate symbol has a bubble on the output line.

  37. Logic gate — Symbols (revision 1376198871 of 22 September 2026)

    Wikipedia contributors, retrieved 2026-09-23. Both the bubble and the wedge can be used on distinctive-shape and rectangular-shape symbols on circuit diagrams

  38. ECE 3310, Experiment 9 — inductor core symbols, Figure 2

    Wayne State University, retrieved 2026-09-22.

  39. ModEL — Components and Symbols, §3.8 (switch symbols, poles, throws and dashed links, pp. 15–16)

    Tony R. Kuphaldt, retrieved 2026-09-23. Note the use of dashed lines to represent a mechanical connection between moving pieces of a component without implying an electrical connection between the same.

  40. ModEL — Components and Symbols, §3.20 (wire crossings and dashed links, p. 36)

    Tony R. Kuphaldt, retrieved 2026-09-23. use the new convention (dot) to show connections between wires, and the old convention (“loop”) to show wires crossing over each other without connection

  41. ModEL — Semiconductor Logic Gates, §2.1 (schematic versus package pinout, p. 8)

    Tony R. Kuphaldt, retrieved 2026-09-23. Research a manufacturer’s datasheet for this logic gate IC to see the “pinout” diagram showing which pins on the IC package connect to which inverter gate terminals inside.